Archimedes Postdoc will Conduct a Tutorial at the International Conference on Microelectronics 2025

Vassilis Alimisis, a postdoctoral researcher at Archimedes, Athena Research Center, Greece, will deliver a tutorial on "Low-Power Analog Hardware Classifier Architecture for ML Applications: From A to Z" at the International Conference on Microelectronics (ICM 2025), taking place on 14-17 December, 2025, in Cairo, Egypt.

Abstract: This tutorial provides a comprehensive introduction to the design and implementation of low-power analog hardware classifiers tailored for machine learning (ML) applications, with a focus on energy-constrained environments such as edge devices and biomedical wearables. With the growing need for fast, efficient, and real-time data processing, analog computing has re-emerged as a promising solution that enables in-memory computation and significantly reduces power consumption compared to conventional digital processors.

The tutorial is designed to guide participants from fundamentals to practical deployment, starting with an overview of analog signal processing principles, followed by an in-depth discussion of circuit-level implementations operating in the sub- threshold region and architectural design of classifiers such as Bayesian classifier, Voting classifier, Gaussian mixture model and Support vector machines. Emphasis is placed on understanding the power-performance trade-offs, the impact of non- idealities, noise resilience, and techniques for enhancing linearity and dynamic range in analog circuits.

Hands-on case studies based on real-life classification tasks (e.g., thyroid disease detection, ECG signal analysis, image edge detection) will be presented using Python, Cadence Virtuoso simulation tools and software-hardware co-design architectures. In addition, the tutorial provide an analysis related to hybrid analog- digital systems, training-aware hardware co-design, and prospects for reconfigurable analog machine learning chips.

This tutorial targets researchers, graduate students, and engineers interested in analog/mixed-signal IC design, edge ML systems, and energy-efficient hardware. Attendees will gain both theoretical insights and practical know-how to design analog classifier architectures that meet the demands of next-generation AI applications.